Problems with CRU configuration

Dear Experts,
I got issues during CRU configuration.
Log:

[flp@aliflp-fit COMMON]$ ./standalone-startup.py -i 2:0.0 -c local -o 1 -p -l 5 -m packet -x ttc

Firmware short hash=0x43069c64
Firmware is dirty status= False
Firmware build date and time=20190709 123752
Altera chip ID=0x00540190-0x28a3040c
=========================================================================================
Starting TTC PON calibration
Traceback (most recent call last):
File “./standalone-startup.py”, line 48, in
cru.ttc.configPonTx(args.onu_address)
File “/home/flp/cru-sw/COMMON/LIB/TTC.py”, line 109, in configPonTx
raise Exception(“PON TX fPLL phase scan failed”)
Exception: PON TX fPLL phase scan failed
[flp@aliflp-fit COMMON]$ ./onu-status.py -i 2:0.0
PON calibration status:
ONU address: 1


ONU RX40 locked: NOT OK
ONU phase good: NOT OK
ONU RX locked: NOT OK
ONU operational: NOT OK
ONU MGT TX ready: NOT OK
ONU MGT RX ready: OK
ONU MGT TX pll lock: NOT OK
ONU MGT RX pll lock: OK

[flp@aliflp-fit COMMON]$

LTU seems to work well.

P.S. this problem occurred after a power cut in evening 18/10/2019. Could it be a problem due to sfp device?

Best Regards,
Artur Furs.

Ciao Artur,
as discussed we should meet this week and have a look at your setup.
Your system is quite old and we should update the firmware and the software.
I will contact you to schedulke a meeting.
Cheers

Dear Artur,
From the report I see that the ONU RX is not locked (that’s why PON Tx also fails), are you sure that the LTU/PON link is ok and has the right clock frequency? Can you share the output of ./report.py as well?
Did you try to restart the LTU (running “olt init”)?

Best regards,
Tuan

Ciao Artur,
indeed I logged in cand configure your CRU to use the LTU.
As Tuan pointed out it looks like the clock coming from the LTU is not right.

Here the output of the report.py

 ./report.py -i2:0.0
=========================================================================================
>>> Firmware short hash=0x43069c64
>>> Firmware is dirty status= False
>>> Firmware build date and time=20190709  123752
>>> Altera chip ID=0x00540190-0x28a3040c
=========================================================================================
TTC clock is selected
------------------------------
               GBT      GBT  Internal                     Datapath        Enabled in
 Link ID   TX mode  RX mode  loopback       GBT mux           mode          datapath
-----------------------------------------------------------------------------------------
Link  0 :      GBT      GBT        NO       TTC:CTP     continuous           Enabled
Link  1 :      GBT      GBT        NO       TTC:CTP     continuous           Enabled
Link  2 :      GBT      GBT        NO       TTC:CTP     continuous           Enabled
Link  3 :      GBT      GBT        NO       TTC:CTP     continuous           Enabled
Link  4 :      GBT      GBT        NO       TTC:CTP     continuous           Enabled
Link  5 :      GBT      GBT        NO       TTC:CTP     continuous           Enabled
Link  6 :      GBT      GBT        NO       TTC:CTP     continuous           Enabled
Link  7 :      GBT      GBT        NO       TTC:CTP     continuous           Enabled
Link  8 :      GBT      GBT        NO       TTC:CTP     continuous           Enabled
Link  9 :      GBT      GBT        NO       TTC:CTP     continuous           Enabled
Link 10 :      GBT      GBT        NO       TTC:CTP     continuous           Enabled
Link 11 :      GBT      GBT        NO       TTC:CTP     continuous           Enabled
Link 12 :      GBT      GBT        NO       TTC:CTP     continuous           Enabled
Link 13 :      GBT      GBT        NO       TTC:CTP     continuous           Enabled
Link 14 :      GBT      GBT        NO       TTC:CTP     continuous           Enabled
Link 15 :      GBT      GBT        NO       TTC:CTP     continuous           Enabled
Link 16 :      GBT      GBT        NO       TTC:CTP     continuous           Enabled
Link 17 :      GBT      GBT        NO       TTC:CTP     continuous           Enabled
Link 18 :      GBT      GBT        NO       TTC:CTP     continuous           Enabled
Link 19 :      GBT      GBT        NO       TTC:CTP     continuous           Enabled
Link 20 :      GBT      GBT        NO       TTC:CTP     continuous           Enabled
Link 21 :      GBT      GBT        NO       TTC:CTP     continuous           Enabled
Link 22 :      GBT      GBT        NO       TTC:CTP     continuous           Enabled
Link 23 :      GBT      GBT        NO       TTC:CTP     continuous           Enabled
------------------------------
24 link(s) found in total
------------------------------
globalgen: | ttc240freq 254.48 MHz | glb240freq 242.30 MHz | ref240freq 240.47 MHz | clk not ok cnt     0 |
Wrapper 0: | ref freq0 0.00 MHz  | ref freq1 0.00 MHz  | ref freq2 243.42 MHz  | ref freq3 0.00 MHz  |

The ttc240 clock is 254.48 MHz

Dear All,

thanks a lot! Rebooting of LTU helped.

Best Regards,
Artur Furs.