TTC interface documentation

From Marian Krivda I got a link to the TTC interface description (

Here one finds the following picture (and a short description of the content of the fields):

First of all, maybe it would be helpful for other developers if this information can also be found in this repository, second, is there maybe a simulation or an emulator which can generate the TTC information, that one can see some more details like how often is this information refreshed, how long is it valid (the valid bit at ‘1’), just for one clock cycle or for a longer period.

And maybe one could verify that my assumption that the TTC_RXD port going into the user_logic corresponds to the TTC PON description is valid. But then there is the question why the width of the TTC_RXD port is set to 192 bits, but in the documentation from CTP one finds at most 120 bit as width for the information.


HI Sebastian and Olivier,
the latest version of CTP document is
However there are no changes in the bits <120:0> which are important at this stage of development.
More comments: the CTP - GBT interface is relevant only for ITS/MFT. The CRU-FE GBT interface is on Olivier side although I believe the original proposal is that it is identical to CTP-ITS one which is defined in the CTP document.
The TTC-PON bits are 200 bits which are received by CRU every LHC bunch (~25 ns), HB bit is <1:1> and HB reject is <2:2>,
please, read the document.
We can continue discussion here or on skype or in person (Marian is at cern permanently; I will be there for couple of days by the end of the nect week).
Cheers, Roman.
@seklewin , @bourrion , @mkrivda